Group III nitrides, for example, GaN (gallium nitride) based semiconductors have been expected as materials for next-generation power semiconductor devices. A GaN-based semiconductor has a wider band gap as compared with Si (silicon). For this reason, as compared with Si (silicon) semiconductor devices, GaN-based semiconductor devices can achieve small-size and high-withstand voltage power semiconductor devices. In addition, the parasitic capacitance can be reduced accordingly, and high-speed driven power semiconductor devices can be thus achieved.
Generally, a high electron mobility transistor (HEMT) structure with a two-dimensional electron gas (2DEG) as a carrier is applied to GaN-based transistors. A typical HEMT is a normally-on transistor which provides conduction without applying a voltage to the gate. For this reason, there is a problem that it is difficult to achieve a normally-off transistor which provides no conduction unless a voltage is applied to the gate. For power supply circuits and the like which handle large amounts of electric power from several hundred V to 1000 V, the operation of normally off is required with emphasis on safety. Therefore, a circuit configuration has been proposed which achieves a normally-off operation with a cascode connection between a normally-on GaN-based transistor and a normally-off Si transistor.
In addition, in the case of a circuit configuration in which a main circuit current flowing between a drain and a source and a driving current flowing between a gate and the source share a source inductance, the driving current is also modulated due to the electromotive force generated on the source inductance with temporal changes in main circuit current. The delay such as the decreased speed of activating or deactivating the power semiconductor device, and the ringing of sharply changing the drain current or the source voltage with time have been problematic, which are caused accordingly. Therefore, a circuit configuration that uses a Kelvin connection has been proposed, in which a main circuit current and a gate driving current share no source inductance.